Power Saving Mode in SoC

Power Saving Mode: Detailed Summary

1. Hardware Power Modes

• Normal (Active): The system operates at full functionality with all components active.
• Clock Gating: Reduces power consumption by disabling the clock signal to certain parts of the circuit.
• Power Gating: Disconnects power supply to certain parts of the circuit to save energy.
• Off: Completely powers down the IP block.

• PMIC (Power Management IC) controls the power state of the IP block.
• When power gating is applied, the IP block is isolated from the power supply.

2. System Power Modes

• Normal (Full Function): The system operates with all features active.
• Low Power: Partial functionality to save power, but still operational.
• Sleep: Most components are powered down, but some essential functions remain active.
• Off: The system is completely powered down.

3. Scenarios

• Normal: Full operational mode.
• Partial: Reduced functionality for power saving.
  • Examples:
    • LCD on idle: Screen is on but no active usage.
    • MP3: Playing music with minimal system activity.
• Idle DRX (Discontinuous Reception): Used in communication systems to reduce power consumption when not actively transmitting or receiving.
  • LTE DRX and GSM DRX: Techniques in cellular communication to save power by cycling between active and sleep states.
• Flight Mode: Disables all wireless communication to save power.

4. Retention Memory

• SRAM (Static RAM): Used for retaining data when the system is in a low-power state.
• SRAM is preferred due to its fast access time and retention capability with minimal power.
• Retention memory allows data to be preserved without full power.

5. Hibernation

• HDD: Hibernate mode in operating systems like Windows.
• Hibernation saves the system state to the hard drive, allowing the system to power off completely.
• When waking up from hibernation, the system state is restored from the saved data.
• This mode saves more power compared to sleep mode but has a longer wakeup time.

• Power Gating Controller: Manages power gating for different functional blocks.
• Power Switching Fabric: Switches power between different blocks.
• Power Gated Functional Block: The section of the circuit that can be power-gated.
• Isol: Isolation block to prevent leakage currents when a block is power-gated.
• Always On Functional Block: Sections that need to remain powered on.

6. Power Gating Considerations

• Wakeup Latency: Time required to restore functionality when waking up from a power-gated state.
• Data Retention: Ensuring data is preserved during power gating.
• Efficiency: Balancing power savings with performance impact.

7. Hardware Auto Power Gating

• Clock Gating vs. Power Gating:
  • Clock gating saves power by stopping the clock signal to flip-flops, but the power gating provides greater power savings by completely cutting off the power supply.
• Automatic hardware control to switch between clock gating and power gating based on system activity to optimize power consumption.

Conclusion

The document outlines various power-saving modes and techniques used in SoCs, including hardware and system-level approaches, specific scenarios, memory retention strategies, and the details of hibernation. The emphasis is on balancing power efficiency with performance, and using techniques like power gating and clock gating effectively.